iommu: translate IO-APIC pins when enabling interrupt remapping
authorRoger Pau Monné <roger.pau@citrix.com>
Fri, 25 Oct 2019 14:03:32 +0000 (16:03 +0200)
committerJan Beulich <jbeulich@suse.com>
Fri, 25 Oct 2019 14:03:32 +0000 (16:03 +0200)
commitecec150ab5ed6055fc06dcdd6d2c65a4f832abc0
tree809a1685360e1c83f3f40525cd52abee5322c9b1
parent0e606c1bc0e5b8ecdf699203fbe6dd29f396a41b
iommu: translate IO-APIC pins when enabling interrupt remapping

On Intel hardware there's currently no translation of already enabled
IO-APIC pins when interrupt remapping is enabled on the IOMMU, hence
introduce a logic similar to the one used in x2apic_bsp_setup in order
to save and mask all IO-APIC pins, and then translate and restore them
after interrupt remapping has been enabled.

With this change the AMD specific logic to deal with enabled pins
(amd_iommu_setup_ioapic_remapping) can be removed, thus unifying the
handling of IO-APIC when enabling interrupt remapping regardless of
the IOMMU vendor.

Reported-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Release-acked-by: Juergen Gross <jgross@suse.com>
xen/drivers/passthrough/amd/iommu_init.c
xen/drivers/passthrough/amd/iommu_intr.c
xen/drivers/passthrough/x86/iommu.c
xen/include/asm-x86/hvm/svm/amd-iommu-proto.h